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学生对 科罗拉多大学波德分校 提供的 FPGA Softcore Processors and IP Acquisition 的评价和反馈

4.1
43 个评分
12 条评论

课程概述

This course will introduce you to all aspects of development of Soft Processors and Intellectual Property (IP) in FPGA design. You will learn the extent of Soft Processor types and capabilities, how to make your own Soft Processor in and FPGA, including how to design the hardware and the software for a Soft Processor. You will learn how to add IP blocks and custom instructions to your Soft Processor. After the Soft Processor is made, you learn how to verify the design using simulation and an internal logic analyzer. Once complete you will know how to create and use Soft Processors and IP, a very useful skill. This course consists of 4 modules, approximately 1 per week for 4 weeks. Each module will include an hour or two of video lectures, reading assignments, discussion prompts, and an end of module assessment....

热门审阅

BT
Jun 11, 2021

Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work

OS
Dec 8, 2020

I feel I did another small step towards mastering designing with fpga. Thank you!

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1 - FPGA Softcore Processors and IP Acquisition 的 12 个评论(共 12 个)

创建者 Claudio C

Aug 2, 2021

In t​his course they do not teach you how to create a soft processor, they simply enumerate some of the existing soft processors and other IPs from major FPGA vendors. Then, they show you how to instantiate and configure a system using the Altera's NIOS-II soft processor and enumerate some of the miracles of the eclipse plugin system not knowing exactly what eclipse is.

There is also a very brief introduction to ModelSim for simulation and verification, which the only useful part of this course, and a less than brief introduction to Altera's SignalTap logic analyzer.

As with the rest of the courses of this "specialization", it is 10% useful and 90% useless.

Summarizing: In general, this course is at the level of a badly done free low quality webinar.

Not worth any money, not worth your time.

创建者 Brandon R V

Oct 11, 2020

Loved the course!

I'm trying everything on my new DE10-Lite.

There's a steep learning curve on the first two weeks, but it all comes together mid week 2.

I had a lot of issues but all of them got solved in the discussion forum.

创建者 Ovidiu S

Dec 9, 2020

I feel I did another small step towards mastering designing with fpga. Thank you!

创建者 KIMBULOBBE H M T M S S

Oct 14, 2020

I learned a lot about modelsim that I was really needed.

创建者 Saadiqbal

Aug 3, 2021

This course brought a great deal of insight in the designing of:

1. NIOS-II processor

2. Integration of pre-existing IP-cores with your design

3. The simulation, debugging and verification of hardware

The core concepts (I have taken from this course) are gemstone and will be guiding star for my future "Embedded system Designing endeavor".

创建者 Bình Đ T

Jun 12, 2021

Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work

创建者 Habte G

Jan 2, 2021

Well prepared lessons(videos). Concise and complete.

创建者 hamza s

Oct 24, 2021

Very helpful, Thnaks for all

创建者 Harold A M S

Sep 7, 2021

The course bring good theoric bases to IPCores but leaves short informacion about the Qsys use, memory map and others things that are necesary for system integration.

创建者 Michael W B

Aug 11, 2021

I was hoping to get more lecture material on writing testbench code.

创建者 Alex G

Sep 29, 2021

The examples do not compile easily in quartus 20.1. Coding examples need to include more about software and building something that actually works. Course needs to be updated.

创建者 Anthony P

Nov 18, 2021

A lot of just slide reading and listing, last week of the course is cool because you understand a bit better the simulation