We have derived a large single nonlinear average model for the peak current mode controller, and we have already seen how that model can be used in the form of Spice sub-circuits to perform Spice simulations of average circuit models. In this lecture you will learn how to perform linearization of this model and construct more accurate small signal equivalent circuit models of converters with peak current mode control. The analytical approach can be used in the design oriented manner to help us decide on the parameter values when we design closed loop voltage regulation around peak current mode controlled converters. Let's look at the derivation of this small-signal averaged CPM model. The starting point is the large signal expression, and as usual, we set the duty cycle to the DC value plus the small signal value. We also do that for the inductor current and so on and perform linearization by neglecting products of small signal quantities. The result of linearization is shown right here, representing the small-signal variation in the inductor current as a function of the small-signal variation in the control current, the duty cycle d, and the small signal components in the slopes m1 and m2. This relationship can be solved for d hat and the result is shown right here. So d hat is put in a form of fm, the modulator gain, times the difference between the control current and the inductor current, small signal sense, and the impact of the input voltage and output voltage perturbations through the gains, called F sub-g and F sub-v. The modulator gain, F sub-m, can be expressed in terms of the steady state slopes, Ma, M1, M2, and the steady state value of the duty cycle. Given the steady state relationship between the slopes M1, M2 and the duty cycle, we can have alternative expressions for the gain, F sub m, and the one that is shown in the bottom is the one that we can conveniently use because the duty cycle is eliminated completely and we only have the dependence on Ma and the slopes of M1 and M2. The complete model is summarized here, in the small signal sense, so again, d hat is a function of ic hat, iL hat, vg hat, and v hat, where the gains in the model are given by an expression for the gain Fm and the gains for Fg and Fv for the three basic converters were shown in the table. You can use this table as a reference with respect to the design of the peak current mode control around the basic three converters, the buck, the boost and the buck-boost. The model can be placed in the block diagram form as shown right here. In a block diagram form, we have a subtraction between i sub-c hat and i sub-L hat, and that difference then takes into account the effects of the vg hat and v hat, which can in turn make a difference in the slopes m1 and m2 that's really what is captured through the gains Fg and Fv. And finally, all that passes through the modulator gain Fm to obtain the small signal duty cycle d-hat. So, the model describes the duty cycle, chosen by the CPM controller, and this model can then be combined with a duty cycle controlled converter model to obtain a complete model for a peak current mode control converter. So here is how that looks for, as an example, a buck converter. So the top part of the model is a standard small-signal average model for the buck converter that you can recognize from earlier courses in the specialization. All we do on top of that is to append in a block diagram form the model for the CPM modulator, the model for the peak current mode controller. And so now, what we have here is a complete small-signal model for the peak current mode controlled buck converter. In exactly the same manner, you can append the model at the bottom for the modulator or for the controller to any other small-signal model of a converter. Here's the case of the boost converter, and here's the case of the buck-boost converter. In summary, the more accurate small-signal model obtained by linearization of that large-signal average relationship we found for the average inductor current as a function of control current, duty cycle and the slopes, can be appended or combined with already known small-signal models for duty cycle controlled PWM converters to obtain complete small signal equivalent circuit models for CPM controlled converters. A table is included as a reference for how to compute the values of Fg, Fv and Fm for the three basic converters. And we have shown circuit diagrams of these complete small signal models.