We will conclude our discussion about analysis, modeling and design of peak current mode controlled converters by looking at a comparison of frequency responses of duty cycle and CPM controlled converters. And to do so, we will take a look at the textbook example. A CPM controlled buck converter is shown right here in the form of a simulation model. This is a buck converter with a rectifying diode, not a synchronous buck converter, so we allow for the possibility that the converter operates in discontinuous conduction mode, and employ a combined CCM- DCM average switch model. We also use a CPM average model that includes the possibility of operation in discontinuous conduction mode. In the setup of the average circuit model we provide the voltages E1 and E2 as controlled voltage sources that depend on the voltages in the converter that produce the slopes of the inductor current during dTs and d’Ts intervals, and the control input is provided as the control voltage source at the input of the CPM modulator. So, in this example here, we will examine or compare control to output, line to output, and output impedance transfer functions for the case when the converter has peak current mode control, and for the case where it's operating at exactly the same operating point but it has duty cycle control. So here is a comparison of control to output frequency responses. The duty cycle controlled converter exhibits a pair of poles with a relatively high Q-factor. In the phase response, you'll see this sharp transition between 0 degrees at low frequencies and minus 180 degrees at high frequencies. In contrast, the peak current mode controlled converter has the magnitude response that is dominated by a low frequency pole. And it has the corresponding phase response that has a phase lag of minus 90 degrees up to frequencies around here. And then only at really high frequencies we see further phase lag associated with the high frequency pole in the improved or more accurate small single model for the CPM controlled converter. So the stark difference between the two control to output frequency responses is notable here. Instead of having to design a more complicated PID type compensator around the duty cycle controlled converter that exhibits a high Q factor response in the control to output transfer function, a simple PI compensator is usually sufficient to design a voltage control loop around the CPM controlled converter that has a much easier to work with control to output transfer function. Notice that in this case here we have exactly the same operating point in terms of the input voltage output voltage and duty cycle for both peak current controlled and duty cycle control case. Here's a comparison of the magnitude responses of the line to output transfer function. So this is the transfer function that would be used to measure how well the converter is responding to, how strongly the converter is responding to disturbances in the input voltage. Note that the peak current mode controlled converter has a much lower magnitude in the line to output frequency response compared to the duty cycle controlled converter. And that's intuitively not surprising at all. We have already discussed the fact that increasing the input voltage reduces the duty cycle by operation of the peak mode controller automatically, without the need for feedback action, and that results in a substantial rejection of disturbances of input voltage variations built into the peak current mode controller. In the simple model for the back converter, we found that this would be actually equal to zero or negative. infinity dB. That's not the case. The more accurate small signal model for the CPM controlled buck converter predicts a finite, non-zero value of the line to output frequency response in magnitude. Finally, let's look at a comparison between the magnitude responses of the output impedance. For a duty cycle controlled converter, the output impedance at low frequency is very low. A duty cycle controlled converter behaves close to a voltage source at low frequencies, and it is not a perfect voltage source only because there are losses in the converter. In contrast, peak current mode controlled converter exhibits a very large value of the low frequency output impedance. And again, intuitively that's very clear because in a peak current mode controlled converter in a simple model the inductor model behaves as a controlled current source. Which really results in a large value of the output impedance at low frequencies. In the peak current mode controlled converter the output impedance exhibits a single pole response that's actually dominated by the output filter capacitor time constant with a load resistance. In the case of duty cycle controlled converter we have resonance between L and C, the elements of the output filter, and that resonance has a high Q factor, as we have already discussed. At very high frequencies, both the peak current mode controlled converter and the duty cycle controlled converter will exhibit an asymptote that is dominated by the output impedance of the output filter capacitor, so the high frequency behavior of the output impedance is exactly the same. So in conclusion, in comparison of frequency responses of duty cycle and CPM controlled converters, we notice that the CPM controlled converters exhibit a dominant low-frequency pole. They have much reduced line to output magnitude responses with a built in rejection of input voltage disturbances, but also have a much larger output impedance at low frequencies. And so a voltage control loop with sufficiently large gain is necessary to construct CPM based voltage regulators. As a final summary for peak current mode control, which we also refer to as Current Programmed Mode or CPM, we have a number of advantages. CPM control converters have built in protection against over-current failures. Transistor failures due to excessive current can be prevented simply by limiting the control input to the controller. We have found that the CPM controlled converters have simpler dynamics and allow simpler, more robust design of the voltage control loop. They have built-in rejection of input voltage disturbances and also have other benefits in terms of prevention of transformer saturation in push-pull or bridge converters or in the ability to parallel converter modules and ensure equal current sharing among them. Disadvantages of peak current mode control are related to susceptibility to noise. We can found that these controllers do require artificial ramp to stabilize over all duty cycles and to improve noise immunity.