Verilog for fun and profit (intro)

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您将学习的技能

Writing Code in Verilog, Simulating FPGA Designs, Designing FPGA Logic, Designing Test Benches, Writing code in VHDL

审阅

4.4(465 个评分)

  • 5 stars
    58.70%
  • 4 stars
    28.38%
  • 3 stars
    6.88%
  • 2 stars
    2.79%
  • 1 star
    3.22%

KK

Jun 4, 2020

This is very good course , but i found some little missing details related to reading materials .\n\nBut this was really very helpful course for me as fresher .

JP

Oct 6, 2020

I think this is a good start in learning how to write VHDL and Verilog.\n\nI would like to see a next level course or recommendations for further writing code.

从本节课中

Basics of Verilog

教学方

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    Timothy Scherr

    Senior Instructor and Professor of Engineering Practice

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    Benjamin Spriggs

    Lecturer and Scholar of Engineering Practice

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